Silicon-on-insulator (SOI) substrates have overwhelming advantages over bulk silicon. It provides IC components formed thereon with good dielectric isolation which immunizes them from parasitic latching that complementary metal oxide semiconductor (CMOS) circuits formed on bulk silicon suffer from. In addition, ICs fabricated on SOI substrates offer the advantages including small parasitic capacitance, a high integration density, a high operating speed, simple fabrication processes, small short channel effects and high suitability for use as low-voltage low-power consumption circuits. Thanks to their inherent advantage of high insulation, CMOS devices on SOI substrates are ideal for use as key components and circuits at RF front-ends, including RF switches, low SNR power amplifiers, modulators and their circuits.
Compared to those on bulk silicon substrates, CMOS RF switches on SOI substrates are remarkably superior in terms of insertion loss and isolation. However, as many CMOS RF components formed on the top silicon thin-film such as RF CMOS switches and CMOS low noise amplifiers (LNAs) are still in electrical coupling with the silicon substrate underlying the insulating layer, during the operation of such components, in particular RF CMOS switches, additional variable parasitic capacitance will occurs which can dramatically affect the linearity of a passed signal. Additionally, a rather large part of the passed signal will be consumed in the silicon substrate due to the coupling.
Theoretically, an ultimate measure to eliminate such coupling between the RF CMOS devices on the top silicon thin-film and the silicon substrate is to remove the silicon substrate during the fabrication of the RF CMOS switches, which, however, may lead to a number of adverse consequences, in particular, lower heat dissipation capabilities of the RF CMOS switches. As a result, upon the application of high signal power in a short period of time, overheating may occur and the reliability of the components may be impaired.